#if 0
source makefile.tcl
exit
#endif

#include "type.h"
#include "zf.h"
#include "nb.h"
#include "io.h"
#include "uart.h"

extern "C" {
	void entryC();
};

/*
inline U32 tsc()
{
	U32 eax;
	__asm volatile("rdtsc": "=a" (eax) );
	return eax;
}
*/
struct Stack
{
	U8 end[0];
	U8 buf[20*1024];
	U8 begin[0];
};
Stack stack;

#define RAM_16 0
#define RAM_32 1
#define RAM_TYPE RAM_32

inline void sdramTriggerCbr(U32 bank)
{
	nbRegs->sdramModeProgram=0x0221|(bank<<1);
	nbRegs->sdramModeProgram=0x0239|(bank<<1);
}

inline void sdramStart(U32 bank)
{
	nbRegs->dramConfiguration2=0x100<<bank;
	nbRegs->sdramModeProgramEx=0;
#if   (RAM_TYPE == RAM_16)
	nbRegs->banks[bank].control=(4<<9)|(1<<12);
#elif (RAM_TYPE == RAM_32)
	nbRegs->banks[bank].control=(2<<9)|(0<<12);
#endif
	nbRegs->banks[bank].timing=0xfc71;//0xffff;
	nbRegs->sdramModeProgram=0x0221|(bank<<1);
	nbRegs->sdramModeProgram=0x0229|(bank<<1);

#if 1
	for(register int i=0;i<8;i++)
	{
		sdramTriggerCbr(bank);
	}
#else
	// ils font comme ca dans le bios !! 
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
	sdramTriggerCbr(bank);
#endif

	nbRegs->sdramModeProgram=0x0231|(bank<<1);
	nbRegs->sdramModeProgram=0x0220|(bank<<1);
}

inline void sdramInit()
{
	nbRegs->sdramSlewControl=0x1249;
	nbRegs->clockSkewAdjust=0;
	nbRegs->writeFifoControl|=0x7;
	nbRegs->processorControl&=~0x0001;
	nbRegs->dramConfiguration2=0;
	nbRegs->dramConfiguration1=0x0020;
	nbRegs->dramRefresh=0x3060;

	sdramStart(0);
}

/*
inline void sdramTest()
{
	U8 v;
	U32* pt;
	U32* const b=(U32*)0x00000000;
	U32* const e=(U32*)0x02000000;
	U32  const d=(U32 )0x00100000/sizeof(U32);

	for(pt=b,v=0;pt<e;pt+=d,v++)
	{
		com1 << *pt << ( ((v&3)==3) ? "\n\r":" ");
	}
	com1 << "\n\r";

	for(pt=b,v=0;pt<e;pt+=d,v++)
	{
		if(v)
			*pt=(v<<16)|v | 0x12003400;
	}

	for(pt=b,v=0;pt<e;pt+=d,v++)
	{
		com1 << *pt << ( ((v&3)==3) ? "\n\r":" ");
	}
}
*/

extern void gotStack(U32 end,U32 begin);

inline bool enableA20()
{
	struct Kbd
	{
		Relative<U8,0x00,Io<U8> > data;
		Relative<U8,0x04,Io<U8> > cmd;
		inline bool readyToWrite()
		{
			return (cmd&2)==0;
		}
		inline void waitReadyToWrite()
		{
			while(!readyToWrite())
				;
		}
	};
	Kbd * const kbd=(Kbd*)0x60;
	U32 * const low =(U32*)0x00000000;
	U32 * const high=(U32*)0x00100000;

	kbd->waitReadyToWrite();
	kbd->cmd=0xd1;
	kbd->waitReadyToWrite();
	kbd->data=0xdf;
	kbd->waitReadyToWrite();
	kbd->cmd=0xff;
	kbd->waitReadyToWrite();

	*low =0;
	*high=0;
	*low=0xdeadbeaf;
	if(*high!=*low)
	{
		//com1<<"enableA20 1 ok\r\n";
		return true;
	}

	*((Io<U8>*)0x92)=0x02;
	while(*((Io<U8>*)0x92)&0x02)
		;

	*low =0;
	*high=0;
	*low=0xdeadbeaf;
	if(*high!=*low)
	{
		//com1<<"enableA20 2 ok\r\n";
		return true;
	}

	//com1<<"enableA20 ko\r\n";
	return false;
}

//void entryC() __attribute((naked));
void entryC()
{
	asm("nop");
	asm("nop");
	asm("nop");
	asm("nop");
	asm("nop");
	asm("nop");
	asm("nop");
	asm("nop");

	(*(Zf<U8>*)0x7c)=8;
	(*(Zf<U8>*)0x5e)=1;

	
	sdramInit();
	//sdramTest();

	// ah, une pile
	asm("mov %0,%%esp": : "i"(stack.begin));
	//asm("mov %0,%%esp": : "i"(0x180000));
	asm("invd");

	enableA20();

	gotStack((U32)stack.end,(U32)stack.begin);

	while(1);
}